A non-volatile memory device is a storage device that may maintain previously stored data even when the power is turned off.
The structure of memory cells constituting the non-volatile memory device may vary according to the field where the non-volatile memory device is used.
In a NAND type flash semiconductor memory device, which is an example of a higher capacity non-volatile semiconductor memory device, a gate of a transistor thereof may include a floating gate in which charges (e.g., data), are stored, and a control gate controlling the floating gate may be sequentially stacked.
To increase memory capacity, the size of memory cells may be rapidly reduced in the flash semiconductor memory device. Also, it may be desirable to reduce the height of the floating gate in a vertical direction according to the reduction in the size of the memory cells.
In addition to reducing the height of the memory cells in a vertical direction, to maintain memory characteristics of a memory cell (for example, the retention characteristic for safely maintaining stored data in case of a leakage current for a long period of time), a semiconductor memory device having a silicon-oxide-nitride-oxide-semiconductor (SONOS) structure or a metal-oxide-insulator-oxide-semiconductor (MOIOS) structure (such as a metal-oxide-nitride-oxide-semiconductor (MONOS)), which are formed of a silicon nitride layer (Si3N4) instead of a floating gate as a means for storing charges, has been suggested and actively researched. The SONOS memory device may use silicon as a material for the control gate, and the MONOS memory device may use metal for a material for the control gate.
The SONOS memory device is disclosed in more detail in “An Embedded 90 nm SONOS Nonvolatile Memory Utilizing Hot Electron Programming and Uniform Tunnel Erase” by C. T. Swift et al., on p. 927-930 in Technical Digest of International Electron Device Meeting (IEDM published in December, 2002).
In general, the SONOS memory device may have a first silicon oxide layer (SiO2) formed as a tunnel insulating layer such that both ends of the silicon oxide layer may contact source and drain regions on a semiconductor substrate between the source and drain regions (e.g., on a channel region). The first silicon oxide layer may be for tunneling of charges. A silicon nitride layer (Si3N4) may be formed on the first silicon oxide layer as a charge trap layer. The silicon nitride layer may be a material layer in which data is substantially stored and charges which have passed through the first silicon oxide layer are trapped in the silicon nitride layer, for example. A second silicon oxide layer may be formed on the silicon nitride layer to block charges that pass through the silicon nitride layer and move upward. A gate electrode may be formed on the second silicon oxide layer.
However, the SONOS memory device having the above structure may have problems in that the permittivity of the silicon nitride layer and the silicon oxide layer is lower and the density of the trap site in the silicon nitride layer may not be sufficient. Thus, the operation voltage may be higher, and the data recording speed (programming speed) and the charge retention time in vertical and horizontal directions may not be as desired.
It has been reported that the programming speed and the retention characteristic may be improved when using an aluminum oxide layer (Al2O3) instead of a silicon oxide layer as the blocking insulating layer. However, the degree of improvement may not yet be sufficient.
Although the blocking insulating layer formed of an aluminum oxide may suppress charges that go out from the silicon nitride layer, the trap site density in the silicon nitride layer itself may still not be sufficient. Thus, the retention characteristic may not be improved by using an aluminum oxide layer.
Further, regarding the SONOS type structure, U.S. Patent Publication No. 2004/0264236 A1 discloses a memory device which may be realized by using an insulating thin film of HfO2 including a lanthanide metal impurity instead of a silicon nitride layer as a charge trap material.
Also, U.S. Pat. No. 6,998,317 discloses a memory device including a charge trap layer that may be formed by stacking an HfO2 insulating thin film and treating the same with plasma.
A memory device including a charge trap layer which may be formed by forming a nanolaminate thin film of HfO2 and Al2O3 thin films using an atom layer deposition (ALD) method as a charge trap material is disclosed in “High density and program-erasable metal-insulator-silicon capacitor with a dielectric structure of SiO2/HfO2—Al2O3 nanolaminate/Al2O3” by Shi-Jin Ding et al., pp. 0429051-0429053 in Applied Physics Letter vol. 88, published in 2006.
When a metal impurity, such as lanthanide metal as disclosed in U.S. Patent Publication No. 2004/0264236 A1, may be formed in an insulating thin film used as a layer to trap and maintain charges (e.g., used as a charge trap layer, or a defect in HfO2 thin film which may be induced by plasma as disclosed in U.S. Pat. No. 6,998,317), is used in a memory device, the defect or the metal impurity, which is a charge trap site, may be randomly arranged in the charge trap layer. Accordingly, the horizontal and vertical distance between trap sites may not be controlled as desired. Thus, it may be difficult to control movement of charges between the trap sites. Due to this characteristic, charge leakage in the vertical and horizontal directions may not be effectively prevented in a non-volatile memory semiconductor device which should retain the trapped charges for long time.
When a nanolaminate thin film is used, the defect of the HfO2 layer in the nanolaminate thin films stacked in the HfO2 and Al2O3 thin films or the defect of the interface defect between the HfO2 and Al2O3 thin films may act as a charge trap site.
When the SONOS semiconductor memory device operating uses the charge trap in the thin films, the density of trap site may determine the programming and retention characteristics. To increase the programming speed, the density of trap site may need to be effectively increased. Because the nanolaminate thin films may use the defect in the HfO2 thin film or the defect of the interface, it may be difficult to increase the density of trap site.